Topics

Number systems and representation

Positional systems and base conversion (integer and fraction parts, grouping for octal and hex, unknown-base equations), unsigned, sign-magnitude, 1's and 2's complement ranges and readings, r's and (r-1)'s complements, sign extension, excess-K, and the codes BCD, excess-3, 2421 and Gray with BCD addition.

3 sheetsDL-02DL-03DL-04

Boolean algebra

Laws and theorems with their duals, De Morgan, absorption, consensus, XOR algebra and algebraic simplification; minterms and maxterms, canonical SOP and POS, duals and complements in index form; counting Boolean, self-dual and other function classes; functional completeness by Post's five classes, NAND and NOR realisations and minimum gate counts.

3 sheetsDL-05DL-06DL-07

Minimization: algebraic, K-map and tabular method

Karnaugh maps for 2 to 5 variables in Gray order, grouping rules, prime and essential prime implicants, don't-cares, minimal SOP and POS, and the Quine-McCluskey tabular method with the prime-implicant chart, row and column reduction and Petrick's method for cyclic charts.

2 sheetsDL-08DL-09

Combinational circuits

Half and full adders and subtractors, ripple-carry and carry-lookahead delay with generate and propagate, adder-subtractor, comparators, multiplexers and implementing functions with them, mux and decoder trees, decoders, encoders and priority encoders, static hazards, and ROM sizing.

2 sheetsDL-10DL-11

Sequential circuits: flip-flops, counters and state machines

SR, D, JK and T latches and flip-flops with characteristic and excitation tables, level versus edge triggering, setup, hold and maximum clock frequency, shift registers, ripple, synchronous, mod-N, ring and Johnson counters, counter design and lockout, Moore and Mealy machines, state minimisation and sequence detectors.

3 sheetsDL-12DL-13DL-14

Fixed-point and floating-point arithmetic

Two's complement addition and subtraction with carry, overflow and flag rules, shifts and fixed-point (Q) formats, shift-and-add and Booth multiplication, restoring and non-restoring division, and IEEE 754 single and double: fields, bias, normal and subnormal values, zero, infinity, NaN, range, precision, encoding, addition and rounding.

4 sheetsDL-15DL-16DL-17

Digital Logic revision: traps, patterns and last day

Digital Logic revision: the traps sheet with wrong turn, correct rule and fix; the question-pattern sheet from stem cue to method and check; and the master last-day sheet with the formulas, tables and conventions of the whole pack.

3 sheetsDL-19DL-20DL-21

All Digital Logic sheets

DL-02Cheat sheet1 pageIn a paid pack

Number Systems and Base Conversion

Positional value of a base-r numeral, the valid digit set, integer conversion by repeated division and fraction conversion by repeated multiplication, when a fraction terminates in a base, grouping between binary, octal and hex (including fractional parts), unknown-base equations and counting their solutions, digits needed for a number, and quick powers of two. Every value checked by script.

DL-03Cheat sheet1 pageIn a paid pack

Signed Integers and Complements

Unsigned, sign-magnitude, 1's complement, 2's complement and excess-K (biased) integers: ranges for n bits, number of zeros, reading one pattern in every form, negation rules and the 2's complement weight formula, sign extension, r's and (r-1)'s complements in any base, subtraction by complement addition with and without end carry, and byte order (endianness). Every value checked by script.

DL-04Cheat sheet1 pageIn a paid pack

Codes: BCD, Excess-3, 2421 and Gray

Weighted and unweighted decimal codes: 8421 BCD with its invalid patterns and bit cost, BCD addition with the +6 correction and its detection function, excess-3 and 2421 as self-complementing codes, excess-3 addition, Gray code construction and both conversions, the unit-distance property and its link to K-map order, parity bits and Hamming distance rules. Every code table and sum checked by script.

DL-05Cheat sheet1 pageIn a paid pack

Boolean Laws and Simplification

The laws of two-valued Boolean algebra with their duals (identity, null, idempotent, complement, involution, distribution both ways, absorption, redundant literal, De Morgan, consensus), the duality principle and the difference between dual and complement, XOR and XNOR algebra, the missing cancellation law, a routine for algebraic simplification with five checked examples, and a verified 2026 GATE question. Every identity checked by truth table.

DL-06Cheat sheet1 pageIn a paid pack

Canonical Forms and Counting Functions

Minterms and maxterms with their index convention, canonical SOP and POS, expanding a non-canonical expression, converting between sum and product lists, complement and dual in index form, Shannon expansion in SOP and POS form, counts of all, self-dual, neutral, symmetric, 0-preserving, affine and monotone functions, how to test self-duality, and a verified 2024 GATE question.

DL-07Cheat sheet1 pageIn a paid pack

Functional Completeness, NAND and NOR

Post's criterion for functional completeness with the five closed classes (0-preserving, 1-preserving, self-dual, monotone, affine), the class membership of every common gate and constant, a decision routine with verified complete and incomplete sets, two-level NAND-NAND and NOR-NOR realisation of SOP and POS, bubble pushing for active-low symbols, and minimum 2-input NAND and NOR counts found by exhaustive search.

DL-08Cheat sheet1 pageIn a paid pack

Karnaugh Maps up to Five Variables

Map layouts for 3 and 4 variables in Gray order with cell numbers, adjacency and wrap-around, group size and literal count, prime, essential prime and redundant implicants, the grouping routine with don't-cares, a fully worked 4-variable map with two minimum covers, the minimal POS from the zeros, a 3-variable and a 5-variable example, and the usual counting traps. All implicant lists come from a Quine-McCluskey script.

DL-09Cheat sheet1 pageIn a paid pack

Quine-McCluskey: Tabular Minimisation

The Quine-McCluskey method step by step: grouping minterms by the number of 1s, merging terms that differ in one bit with aligned dashes, checking off merged terms, reading prime implicants, the prime-implicant chart with essential columns, row and column dominance, Petrick's method for cyclic charts, and how don't-cares enter. A full 4-variable tabulation and chart and a cyclic 3-variable chart, all generated by script.

DL-10Cheat sheet1 pageIn a paid pack

Adders, Lookahead and Comparators

Half and full adders and subtractors with truth tables and equations, a full adder from two half adders, the ripple-carry adder and its delay in a per-stage model and a gate model, carry lookahead with generate and propagate, the 4-bit lookahead structure and its delay and gate-count growth, block lookahead for 16 bits, the adder-subtractor, and 1-bit and 4-bit magnitude comparators. Truth tables, equations and delays checked by script over all inputs.

DL-11Cheat sheet1 pageIn a paid pack

Mux, Decoder, Encoder and Hazards

Multiplexer equations and the implementation-table method for realising an (n+1)-variable function on a 2^n:1 mux, the 2:1 mux as a universal element, mux trees and decoder trees with block counts, decoders as minterm generators with active-high and active-low outputs, encoders and the 4:2 priority encoder, static hazards and the consensus cure, and ROM sizing. Every realisation simulated over all inputs.

DL-12Cheat sheet1 pageIn a paid pack

Latches, Flip-Flops and Timing

SR latches built from NOR (active-high) and NAND (active-low) gates and their forbidden inputs, gated and D latches, level versus edge triggering with a simulated timing diagram, SR, JK, D and T characteristic tables and equations, the excitation table, flip-flop conversions, race-around and master-slave, asynchronous preset and clear, setup, hold and clock-to-Q, and the minimum clock period with and without skew.

DL-13Cheat sheet1 pageIn a paid pack

Registers and Counters

Shift registers and their clock counts, ripple (asynchronous) counters with count direction by edge and output, settling delay and transient states, synchronous binary counters and their maximum frequency, mod-N counters with asynchronous clear, ring and Johnson counters with unused and lockout states, frequency division, and a synchronous counter designed with D and JK flip-flops including its unused-state check. All sequences simulated.

DL-14Cheat sheet1 pageIn a paid pack

Moore and Mealy Machines

Moore versus Mealy machines and their output timing, the overlapping 101 detector in both models with state diagrams and tables, overlapping versus non-overlapping detection, minimum state counts for k-bit patterns, the synchronous FSM design routine, state minimisation by partition refinement on a worked table, flip-flop counts for binary and one-hot assignment. State counts, tables and output strings generated by script.

DL-15Cheat sheet1 pageIn a paid pack

Fixed Point: Add, Subtract, Overflow

Two's complement addition and subtraction on one adder, the three equivalent signed-overflow rules, unsigned carry and borrow, the N, Z, C, V flags, nine 4-bit cases with every carry, a verified 2024 GATE overflow question, one's complement end-around carry, sign extension before mixed-width addition, logical and arithmetic shifts and their overflow, and Q-format fixed-point values, range, resolution and products. Every case computed by script.

DL-16Cheat sheet1 pageIn a paid pack

Multiplication (Booth) and Division

Product width for unsigned and signed operands, shift-and-add multiplication with partial products, Booth's algorithm with its decision table, a full 4-bit trace and the M = -2^(n-1) corner case, Booth recoding and the number of add or subtract operations, restoring and non-restoring division with full 4-bit traces, and the sign of a signed remainder. Every trace generated and every algorithm checked over all 4-bit inputs by script.

DL-17Cheat sheet1 pageIn a paid pack

IEEE 754: Formats and Range

IEEE 754 binary32 and binary64 fields, bias and exponent ranges, the value of normal and subnormal patterns, zero, infinity and NaN encodings, maximum, minimum normal and minimum subnormal values, machine epsilon, spacing of consecutive values, exactly representable integers, counts of each kind of pattern, ordering of patterns, and the general formulas applied to a small 8-bit IEEE-like format. All limits computed with struct and numpy.

DL-18Cheat sheet1 pageIn a paid pack

IEEE 754: Encode, Add and Round

Step-by-step encoding and decoding of IEEE 754 single precision with worked values (5.75, -0.75, -13.625, 0.1, 10, -0.15625, a subnormal), double-precision examples, two verified GATE 2026 questions (decode 0xC2710000, add 0x35C00000 and 0x34A00000), the floating-point addition algorithm with alignment and normalisation, the four rounding modes with ties-to-even, guard, round and sticky bits, rounding of large integers, overflow, underflow and non-associativity. Every pattern and result produced by struct and numpy.

DL-19Cheat sheet1 pageIn a paid pack

Digital Logic Traps Sheet

Twenty-eight common wrong turns across the pack, each with the correct rule and a one-line check: canonical lists, De Morgan and distribution, XNOR chains, functional completeness, K-map order and implicant counts, don't-cares, mux and decoder trees, carry versus overflow, signed ranges, unknown bases, BCD and Gray code, flip-flops, counters and timing, sequence detectors, Booth and division, and IEEE 754 bias, subnormals and rounding.

DL-20Cheat sheet1 pageIn a paid pack

Question Patterns

Twenty-one recurring Digital Logic question shapes, each with the cue in the stem, the first step and method, the check that catches a wrong answer and the assumption to confirm, plus one general routine for any Digital Logic question. No frequency claims; each row points to the sheet with the full method.

DL-21Cheat sheet1 pageIn a paid pack

Master Last-Day Revision Sheet

The whole pack on one page: number ranges and conversions, codes, Boolean laws, canonical-form index rules, function counts, completeness test, K-map order and implicant routine, adder and lookahead equations, mux and decoder counts, flip-flop tables, counter and timing formulas, detector state counts, overflow rules, Booth, and IEEE 754 fields, limits and patterns.

Connected subjects

Computer Organization & ArchitectureEngineering MathematicsTheory of Computation