Digital Logic · topic
Two's complement addition and subtraction with carry, overflow and flag rules, shifts and fixed-point (Q) formats, shift-and-add and Booth multiplication, restoring and non-restoring division, and IEEE 754 single and double: fields, bias, normal and subnormal values, zero, infinity, NaN, range, precision, encoding, addition and rounding.
Two's complement addition and subtraction on one adder, the three equivalent signed-overflow rules, unsigned carry and borrow, the N, Z, C, V flags, nine 4-bit cases with every carry, a verified 2024 GATE overflow question, one's complement end-around carry, sign extension before mixed-width addition, logical and arithmetic shifts and their overflow, and Q-format fixed-point values, range, resolution and products. Every case computed by script.
A partial preview of the top of the sheet. The full sheet is in the Digital Logic cheat sheet pack.
Product width for unsigned and signed operands, shift-and-add multiplication with partial products, Booth's algorithm with its decision table, a full 4-bit trace and the M = -2^(n-1) corner case, Booth recoding and the number of add or subtract operations, restoring and non-restoring division with full 4-bit traces, and the sign of a signed remainder. Every trace generated and every algorithm checked over all 4-bit inputs by script.
A partial preview of the top of the sheet. The full sheet is in the Digital Logic cheat sheet pack.
IEEE 754 binary32 and binary64 fields, bias and exponent ranges, the value of normal and subnormal patterns, zero, infinity and NaN encodings, maximum, minimum normal and minimum subnormal values, machine epsilon, spacing of consecutive values, exactly representable integers, counts of each kind of pattern, ordering of patterns, and the general formulas applied to a small 8-bit IEEE-like format. All limits computed with struct and numpy.
A partial preview of the top of the sheet. The full sheet is in the Digital Logic cheat sheet pack.
Step-by-step encoding and decoding of IEEE 754 single precision with worked values (5.75, -0.75, -13.625, 0.1, 10, -0.15625, a subnormal), double-precision examples, two verified GATE 2026 questions (decode 0xC2710000, add 0x35C00000 and 0x34A00000), the floating-point addition algorithm with alignment and normalisation, the four rounding modes with ties-to-even, guard, round and sticky bits, rounding of large integers, overflow, underflow and non-associativity. Every pattern and result produced by struct and numpy.
A partial preview of the top of the sheet. The full sheet is in the Digital Logic cheat sheet pack.
