Computer Organization & Architecture · topic
Ripple-carry and carry-lookahead adders with gate-delay counts, the adder-subtractor, overflow logic and flags, array and Booth multiplication, shifters, and the single-bus and three-bus datapaths with the register transfers and control steps of fetch and execute.
Half and full adders, the ripple-carry adder with given full-adder delays and with a gate-delay model, carry lookahead with generate and propagate, the delays of single-level, rippled-block and two-level lookahead adders for 16 bits, the adder-subtractor, overflow logic with a table of 8-bit cases, the four flags and the two's complement facts behind them.
A partial preview of the top of the sheet. The full sheet is in the Computer Organization & Architecture cheat sheet pack.
Shift-and-add multiplication, the combinational array multiplier and its gate counts, Booth's algorithm with a full register trace of 7 times minus 3, Booth recoding with best and worst cases, bit-pair (radix-4) recoding, the most-negative-multiplicand edge case, logical and arithmetic shifts and rotates with their numeric meaning, and the barrel shifter.
A partial preview of the top of the sheet. The full sheet is in the Computer Organization & Architecture cheat sheet pack.
The single-bus datapath with its PC, MAR, MDR, IR, register file and the Y and Z registers around the ALU, register-transfer notation and the four classes of micro-operation, the control steps and signals for instruction fetch, register and memory-operand ADD, store and branch, and the same addition on a three-bus datapath, with the rules for counting steps.
A partial preview of the top of the sheet. The full sheet is in the Computer Organization & Architecture cheat sheet pack.
