Computer Organization & Architecture · topic
Direct, set-associative and fully associative mapping, the tag, index and offset split, tag-memory size and lookup hardware, traced reference strings with LRU and FIFO, the three miss types, array traversal misses, write-through and write-back with allocation policies, and multilevel caches.
Direct, set-associative and fully associative mapping: the tag, index and offset formulas, one cache at one, two, four and all ways, locating a given address, how many memory blocks compete for a set, tag-memory size with valid, dirty and replacement bits, comparators and multiplexers, the rules for doubling ways, capacity or block size, a word-addressable split and a solved past GATE question.
A partial preview of the top of the sheet. The full sheet is in the Computer Organization & Architecture cheat sheet pack.
One block reference string replayed on a direct-mapped, a 2-way FIFO, a 2-way LRU and a fully associative cache, the compulsory, capacity and conflict classification, replacement policies and their bookkeeping bits, miss counts for row-order and column-order traversal of a 2-D array (simulated), a 1-D sweep, the effect of block size, associativity and capacity, and FIFO's anomaly.
A partial preview of the top of the sheet. The full sheet is in the Computer Organization & Architecture cheat sheet pack.
Write-through versus write-back, write-allocate versus no-write-allocate and their usual pairings, the dirty bit and write buffer, effective access time under each policy worked with one set of numbers, memory write traffic, two-level caches with local and global miss rates, stall cycles per instruction and misses per thousand instructions, inclusion, and a solved past GATE question on write policies.
A partial preview of the top of the sheet. The full sheet is in the Computer Organization & Architecture cheat sheet pack.
